Specify the architecture used for the decoding
Enumerates the possible branche types
This field allows you to define some display options. You can specify the syntax : masm, nasm, goasm or AT&T. You can specify the number format you want to use : prefixed numbers or suffixed ones. You can even add a tabulation between the mnemonic and the first operand or display the segment registers used by the memory addressing.
Enumerates the possible consequences the instruction have on an Eflag.
Enumerates the possible instruction categories
Enumerates the possible instruction sets
The Disasm function allows you to decode all instructions coded according to the rules of IA-32 and Intel 64 architectures. It makes a precise analysis of the focused instruction and sends back a complete structure that is usable to make data-flow and control-flow studies. Disasm is able to decode all the documented intel instructions (standard instructions, FPU, MMX, SSE, SSE2, SSE3, SSSE3 ,SSE4.1, SSE4.2, VMX, CLMUL and AES technologies) and undocumented ones like SALC, FEMMS (instruction AMD), HINT_NOP, ICEBP and aliases.
Describes an instruction argument
This structure is used to store the mnemonic, source and destination operands. You just have to specify the address where the engine has to make the analysis.
This structure gives information on the EFLAG registers.
Output structure describing an instruction
This structure gives information on the memory access type, according to the formula BaseRegister + IndexRegister*Scale + Displacement]